1,519 research outputs found

    LAPAS: A SiGe Front End Prototype for the Upgraded ATLAS LAr Calorimeter

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    We have designed and fabricated a very low noise preamplifier and shaper to replace the existing ATLAS Liquid Argon readout for use at the Large Hadron Collider upgrade (sLHC). IBM’s 8WL 130nm SiGe process was chosen for it’s radiation tolerance, low noise bipolar NPN devices, wide voltage rand and potential use in other sLHC detector subsystems. Although the requirements for the final design can not be set at this time, the prototype was designed to accommodate a 16 bit dynamic range. This was accomplished by using a single stage, low noise, wide dynamic range preamp followed by a dual range shaper. The low noise of the preamp is made possible by the low base spreading resistance of the Silicon Germanium NPN bipolar transistors. The relatively high voltage rating of the NPN transistors is exploited to allow a gain of 650V/A in the preamplifier which eases the input voltage noise requirement on the shaper. Each shaper stage is designed as a cascaded differential operational amplifier doublet with a common mode operating point regulated by an internal feedback loop. Measurement of the fabricated circuits indicates their performance is consistent with the desig

    A 64-pixel Positron-Sensitive Surgical Probe

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    We report on the continued development of a 64-pixel positron-sensitive surgical probe with a dual-layer detector and multi-anode PMT. An 8 x 8 array of this plastic scintillators in teh first layer detects positrons and a matched GSO crystal array in the second layer detects annihilation 511 keV gammas, which are required to be in coincidence with the detected positrons. Also, the 64 PMT anode signals are differentiated and an overshoot threshold is applied to separate the fast decay plastic anode signals from the slower GSO signals. Finally, an energy threshold is applied to the summed anode signal to distinguish 511 keV gammas from the 140 keV gammas commonly used in sentinel lymph node (SLN) surgery. Previously we reported on how these signal selection criteria were individually tested and optimized based on 9 channels of prototype electronics [1-2]. Currently the electronics shave been upgraded to XilinxŸ programmable components, allowing on-the-fly alteration of signal selection criteria, and all 64 channels are operational. Initial measurements of the complete 64-pixel probe were conducted using 18F-FDG positron sources and 18F-FDG and 99mTcphantoms (background 511 keV and 140 keV gammas), simulating lesions in the SLN surgery environment. The average positron sensitivity is measured to be 3.0-7.0 kcps/”Ci at different signal selection criteria. The lower bound on sensitivity corresponds to settings optimized for high image resolution and high background rejection ability. The upper bound on sensitivity corresponds to settings optimized for high sensitivity at the cost of lower image resolution and lower background rejection ability. The measured true-to-background contrast in the presence of clinically observed levels of 511 keV and 140 keV background gammas is ~3:1 for a tumor-to-background uptake ratio of 5:1. Performance measurements of the complete 64-pixel probe including sensitivity, true-to-background ratio, and the pixel separation ability are presented

    Performance of the ABCN-25 readout chip for the ATLAS Inner Detector Upgrade

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    We present the test results of the ABCN-25 front end chip implemented in CMOS 0.25 ÎŒm technology and optimised for the short, 2.5 cm, silicon strips intended to be used in the upgrade of the ATLAS Inner Detector. We have obtained the full functionality of the readout part, the expected performance of the analogue front-end and the operation of the power control circuits. The performance is evaluated in view of the minimization of the power consumption, as the upgrade detector may contain up to 70 million of channels. System tests with different power distribution schemes proposed for the future tracker detectors are possible with this chip. The ABCN-25 ASIC is now serving as the prototype readout chip in the developments of the modules and staves for the upgrade of the ATLAS Inner Detector

    LAPAS: A SiGe Front End Prototype for the Upgraded ATLAS LAr

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    We have designed and fabricated a very low noise preamplifier and shaper with a (RC)2 – CR response to replace the existing ATLAS Liquid Argon readout for use at SLHC. IBM’s 8WL 130nm SiGe process was chosen for its radiation tolerance wide voltage range and potential for use in other LHC detector subsystems. The required dynamic range of 15 bits is accomplished by utilization of a single stage, low noise, wide dynamic range preamp connected to a dual range shaper. The low noise of the preamp (~.01nA / √Hz) is achieved by utilizing the process Silicon Germanium bipolar transistors. The relatively high voltage rating of the npn transistors is exploited to allow a gain of 650V/A. With this gain the equivalent input voltage noise requirement on the shaper to about 2.2nV/ √Hz. Each shaper stage is designed as a cascaded differential op amp doublet with a common mode operating point regulated by an internal feedback loop. The shaper outputs are designed to be compatible with the 130nm CMOS ADC being developed in parallel with this effort. Preliminary measurement of the fabricated circuits indicates their performance is consistent with the design specifications

    Identification of complex health interventions suitable for evaluation: development and validation of the 8-step scoping framework

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    Background: There is extensive literature on the methodology of evaluation research and the development and evaluation of complex interventions but little guidance on the formative stages before evaluation and how to work with partner organizations that wish to have their provision evaluated. It is important to be able to identify suitable projects for evaluation from a range of provision and describe the steps required, often with academic institutions working in partnership with external organizations, in order to set up an evaluation. However, research evaluating programs or interventions rarely discusses these stages. Objective: This study aimed to extend work on evaluability assessment and pre-evaluation planning by proposing an 8-Step Scoping Framework to enable the appraisal of multiple programs in order to identify interventions suitable for evaluation. We aimed to add to the literature on evaluability assessment and more recent evaluation guidance by describing the processes involved in working with partner organizations. Methods: This paper documents the steps required to identify multiple complex interventions suitable for process and outcome evaluation. The steps were developed using an iterative approach by working alongside staff in a local government organization, to build an evidence base to demonstrate which interventions improve children’s outcomes. The process of identifying suitable programs for evaluation, thereby establishing the pre-evaluation steps, was tested using all Flying Start provision. Results: The 8-Step Scoping Framework was described using the example of the local government organization Flying Start to illustrate how each step contributes to finding projects suitable for process and outcome evaluation: (1) formulating overarching key questions that encompass all programs offered by an organization, (2) gaining an in-depth understanding of the work and provision of an organization and engaging staff, (3) completing a data template per project/program offered, (4) assessing the robustness/validity of data across all programs, (5) deciding on projects suitable for evaluation and those requiring additional data, (6) negotiating with chosen project leads, both within and outside the organization, (7) developing individual project evaluation protocols, and (8) applying for ethical approval from the university and partner organization. Conclusions: This paper describes the processes involved in identifying suitable projects for evaluation. It adds to the existing literature on the assessment of specific programs suitable for evaluation and guidance for conducting evaluations by establishing the formative steps required to identify suitable programs from a range of provision. This scoping framework particularly relates to academic partners and organizations tasked with delivering evidence-based services designed to meet local needs. The steps identified have been described in the context of early years provision but can be applied to a range of community-based evaluations, or more generally, to cases where an academic partner is working with external stakeholders to identify projects suitable for academic evaluation

    Radiation hardness studies of a 130 nm Silicon Germanium BiCMOS technology with a dedicated ASIC

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    We present the radiation hardness studies on the bipolar devices of the 130 nm 8WL Silicon Germanium (SiGe) BiCMOS technology from IBM. This technology has been proposed as one of the candidates for the Front-End (FE) readout chip of the upgraded Inner Detector (ID) and the Liquid Argon Calorimeter (LAr) of the ATLAS Upgrade experiment. After neutron irradiations, devices remain at acceptable performances at the maximum radiation levels expected in the Si tracker and LAr calorimeter

    A double-sided silicon micro-strip super-module for the ATLAS inner detector upgrade in the high-luminosity LHC

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    The ATLAS experiment is a general purpose detector aiming to fully exploit the discovery potential of the Large Hadron Collider (LHC) at CERN. It is foreseen that after several years of successful data-taking, the LHC physics programme will be extended in the so-called High-Luminosity LHC, where the instantaneous luminosity will be increased up to 5 × 1034 cm−2 s−1. For ATLAS, an upgrade scenario will imply the complete replacement of its internal tracker, as the existing detector will not provide the required performance due to the cumulated radiation damage and the increase in the detector occupancy. The current baseline layout for the new ATLAS tracker is an all-silicon-based detector, with pixel sensors in the inner layers and silicon micro-strip detectors at intermediate and outer radii. The super-module is an integration concept proposed for the strip region of the future ATLAS tracker, where double-sided stereo silicon micro-strip modules are assembled into a low-mass local support structure. An electrical super-module prototype for eight double-sided strip modules has been constructed. The aim is to exercise the multi-module readout chain and to investigate the noise performance of such a system. In this paper, the main components of the current super-module prototype are described and its electrical performance is presented in detail
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